Silicon germanium epitaxially grown alloys provide a promising solution to high frequency, high speed devices in readily available, low cost silicon-based structures. The evolution of silicon germanium materials and technologies has occurred quickly. With cutoff frequencies in excess of 100 GHz, silicon-germanium can achieve switching speeds of comparable III-V semiconductor devices. The energy bandgap of an alloy of silicon-germanium is smaller than it is for silicon, lying between the intrinsic bandgap of silicon (1.12 eV) and germanium (0.66 eV). The bandgap is reduced further by the compressive strain in the alloy layer, with the bandgap being reduced still further with increasing germanium content.
In strained lattice structure silicon-germanium alloys, grown on a silicon substrate, a bandgap reduction is due to a valence band offset. The conduction and valence band edges of the strained layers of the alloy of silicon-germanium lie within the band edges of the underlying silicon, which has attendant benefits in bandgap engineering to fabricate fast switching speed transistors. Furthermore, the low pressure chemical vapor deposition technique employed by Myerson et al. as is disclosed in U.S. Pat. No. 5,298,452, the disclosure which is specifically incorporated herein by reference, allows for a controlled grading of germanium concentration across the base layer.
The smaller bandgap of the alloy of silicon and germanium in a heterojunction bipolar transistor (HBT) is utilized as follows. The reduction in the base bandgap due to the intrinsically reduced bandgap of the silicon-germanium alloy compared to silicon is produced at the emitter-base junction. The base bandgap junction exponentially increases the collector current for a particular bias voltage, resulting in a large increase in current gain when compared with bipolar homojunction transistors in silicon. By adding the germanium to the emitter-base junction, the potential barrier is lower at the junction, and for a given bias voltage, more electrons are injected from the emitter to the base where they contribute to the collector current. Additionally, by grading the junction across the base region, the conduction band edge in the base becomes dependent upon the position in the base, resulting in an electrostatic field within the base region. The electrostatic field accelerates the injected minority carriers traversing the base. This reduces the base transit time and significantly increases the frequency response of the device. Additionally, the silicon germanium alloy in the base region improves the output resistance of the transistor.
While silicon germanium alloys have met with great success in a variety of HBT structures and applications, it is desirable to utilize such a structure in high power applications. As is well known to one of ordinary skill in the art, ballasting is often necessary in high power transistor applications. To this end, with higher power, higher temperatures of operation result in an increased current at the collector which in turn increases the temperature of the device. The relationship between PN junction diode current and temperature is well known, and clearly the increase in temperature results in an increase in current which in turn results in an increase in temperature. This self-feeding problem is known as thermal runaway and must be remedied. Furthermore, in power devices, thermal runaway occurs because parallel devices are not all identical and do not have identical heat dissipation capability. When one HBT get slightly hotter than a neighboring device, it begins to carry more current, which results in an increase in its temperature, which increases its current, and so forth. This unstable condition can rapidly lead to the destruction of the operation of the entire device. As a particular unit device is destroyed, the remaining devices begin to carry more current which increases the temperature and increases the likelihood of their ultimate destruction. A generally accepted way of controlling thermal runaway problems is to place a fixed resistance in series with each emitter of the transistors which are connected in parallel. This emitter resistance is preferably identical in each transistor with a magnitude of three to ten times the intrinsic impedance of the device. In this manner, the current level in each transistor is essentially the same.
Conventional methods used to fabricate emitter resistance in power devices is, for example, the fabrication of a NiCr thin film metal resistor connected to the emitter by well known techniques. Unfortunately, thin film metals in power devices often end up acting as mere fuses. In order to circumvent this problem, thicker metal films were tried, to handle the current levels of power devices. Unfortunately, due to the relatively low sheet resistance of the thick metal films, this approach results in physically long resistors which can add unwanted parasitic inductance levels at higher frequencies. One possible alternative technique for fabricating emitter resistance for ballasting is the use of polysilicon which is appropriately doped to the proper resistance level. For example, doping polysilicon with a suitable dopant of boron, arsenic, or phosphorous is an alternative to metal resistors. However, certain process issues are raised during this fabrication step. As stated earlier, the reduction in the bandgap of silicon-germanium is put to great use in the HBT structure of Si-SiGe-Si structures. While the reduction in the bandgap of a silicon-germanium alloy is partly due to the fact that germanium reduces the silicon bandgap, it is of course important to note that the bandgap is further reduced by the compressive strain in the alloy layer. To this end, as stated above, the bandgap is reduced even further with increasing germanium content than might otherwise be expected. At high temperatures, the silicon-germanium lattice structure of the alloy relaxes, reducing significantly the benefit gained in the bandgap engineered via the strained layers of silicon-germanium. Accordingly, in the fabrication of ballast resistors, it is necessary to avoid exposing of the silicon-germanium alloy to high termperatures. One possible approach would be to fabricate the resistors at a low temperature. Unfortunately, for the sheet resistance values desired, on the order of 50-250 Ohm/square conductivities cannot be achieved at low temperatures.
Accordingly, what is needed is a technique which enables the fabrication of ballast resistors in polysilicon in a manner so as not to relax the strained layers in the lattice of the silicon-germanium transistor.